Storage Capacitance Minimization In Led Drivers Based On Photometrical Constraints And Converter Integration
DOI:
https://doi.org/10.18618/REP.2013.2.962971Keywords:
Converter Integration, Electrolytic Capacitor Avoidance, LED Off-line Drivers, Photometrical Constraint on LED Ripple, LED Current RippleAbstract
This work proposes a novel combined approach for reducing the storage capacitances in off-line high power factor LED drivers. The proposal is to combine converter integration (power factor correction plus power control stages sharing a common switch) with photometrical constraints on the maximum allowable LED current ripple. An experimental setup was used to assess the upper limit for current ripple on the LEDs based on luminous flux drop, efficacy drop and chromaticity coordinate change. By combining the ripple design constraint obtained from photometrical measurements with the design methodology of an integrated converter, the largest storage capacitances (bus and output capacitors) were greatly reduced, allowing the use of small film capacitors of long lifespan, rather than relying on large short-lived electrolytic capacitors. As a design example, an integration between a SEPIC power factor preregulator and a buck-boost power control stage was chosen and a prototype was built, fed from 220 V / 60 Hz mains voltage and feeding 56 series-associated LEDs (ca. 70 W). The driver imposed a 50% current ripple on the LEDs, value for which it was found to yield only 0.2% decrement in luminous flux, while preserving color stability.
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